Physical design

Smart VLSI Physical Design course is based on Cadence Implementation flow which is one of the widely used PnR flows in the current industry.

Physical design course covers Netlist to GDSII flow which has all the below stages

• Design Setup

• Floorplanning

• Placement

• Power Ground Routing

• Scan chain re-ordering

• Clock Tree Synthesis

• Detailed Routing & Post route optimization

• Timing based Engineering Change Order flow (Timing eco generation)

• Power Analysis (IR static and dynamic)

• DFM Design For Manufacturability

• Physical verification(PV)

• Functional Verification (FV)

• Conformal low power checks (CLP)